Clarification regarding stencil cache eviction (Assignment 10)

Clarification regarding stencil cache eviction (Assignment 10)

by Christie Louis Alappat -
Number of replies: 0

Dear Students,

today in the tutorial of Assignment 10, there was a question regarding cache eviction and data layout change (inner dimension t) for stencil.

The question was whether the best case code balance for main-memory is 32 Bytes/LUP always in case 't' is innermost dimension. 

And the answer is yes if the stencil data has to come from main-memory, i.e., N is big enough. While browsing through the recording I realised I only talked till the caches and said it holds for caches to which eviction takes place. This is also true for main-memory because at some point eviction will take place to main-memory. Therefore, we will always observe at least 32 Bytes/LUP traffic from main memory. 

Detailed explanation:

In the tutorial we discussed that the eviction need not take place immediately to main-memory for a write-back cache and an updated cache line will be declared as modified. At certain point when the cache is full or some other threads need to the data the modified cache line will be evicted.

Due to the same reason at some point the cacheline containing both the RHS and LHS data of stencil that is declared modified will be evicted at a certain point to main-memory (for example when caches are full), if the entire data-set size is big enough to fit in no cache (i.e., 2*N^3*8 > CS).


Best

Christie