Question regarding slide set3b

Question regarding slide set3b

by Mehmet Arif Bağcı -
Number of replies: 1

Slide Set 3b

Hi,

In slide set 3b, page 24, the bottleneck is described as the execution unit/port that requires the longest time to execute the instruction, with its utilization time defined as T^inst max[cy]

I would like to clarify what exactly is meant by "utilization time" in this context. Does it refer to the pipeline depth of the bottleneck instruction, or is it related to the throughput?

Thank you for your time and attention.

In reply to Mehmet Arif Bağcı

Re: Question regarding slide set3b

by Georg Hager -

Dear Mehmet Arif Bağcı,

it is related to the throughput. In these "utilization timelines" you can view each slot as a cycle in which an instruction starts in its pipeline. If a core has two FMA pipelines, it can start (or retire) two FMAs each cycle. A possible third one will have to go to the next cycle. 

Hope that helps,

Georg.