Node-Level Performance Engineering @HLRS

Topic outline

• General

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  This course covers performance engineering approaches on the compute node level. Even application developers who are fluent in OpenMP and MPI often lack a good grasp of how much performance could at best be achieved by their code. This is because parallelism takes us only half the way to good performance. Even worse, slow serial code tends to scale very well, hiding the fact that resources are wasted. This course conveys the required knowledge to develop a thorough understanding of the interactions between software and hardware. This process must start at the core, socket, and node level, where the code gets executed that does the actual computational work. We introduce the basic architectural features and bottlenecks of modern processors and compute nodes. Pipelining, SIMD, superscalarity, caches, memory interfaces, ccNUMA, etc., are covered. A cornerstone of node-level performance analysis is the Roofline model, which is introduced in due detail and applied to various examples from computational science. We also show how simple software tools can be used to acquire knowledge about the system, run code in a reproducible way, and validate hypotheses about resource consumption. Finally, once the architectural requirements of a code are understood and correlated with performance measurements, the potential benefit of code changes can often be predicted, replacing hope-for-the-best optimizations by a scientific process.

  Lecturers: Georg Hager and Jan Eitzinger, Erlangen National High Performance Computing Center, Bert Wesarg, Center for Information Services and High Performance Computing (ZIH)

  Course date: June 18-20, 2024 (9:00 am - 4:00 pm) and June 21, 2024 (9:00 am - 12:15 pm)

  This course will be conducted online as a Zoom event. Details will be sent vie e-mail to registered participants.

  Course Outline:

  Introduction

  • Basic architecture of multicore systems: threads, cores, caches, sockets, memory
  • The important role of system topology

  
  

  Tools topology and affinity in multicore environments

  • Overview
  • likwid-topology and likwid-pin

  
  

  Roofline model: basics

  • Model assumptions and construction
  • Simple examples
  • Limitations of the Roofline model

  
  

  Tools: hardware performance counters

  • Why hardware performance counters?
  • likwid-perfctr
  • Applications

  
  

  Roofline case studies

  • Stencil algorithms
  • Tall & Skinny dense matrix-matrix multiplication
  • Sparse matrix-vector multiplication

  
  

  Basic skills in performance engineering

  
  

  Optimal use of parallel resources

  • Single Instruction Multiple Data (SIMD)
  • Cache-coherent Non-Uniform Memory Architecture (ccNUMA)

  
  

  Extending Roofline: The ECM performance model

  Performance Engineering using Score-P and Vampir

  • Analyzing MiniMD
  • Analyzing SpMV

  
  

  
  

  • 

    Course schedule (day 1-3) File
  • 

    Tools Day schedule (day 4) File
  • 

    Example code ZIP file with solution hints

• Day 1
  • 

    General intro File
  • 

    Introduction to computer node architecture File
  • 

    Hands-on: Logging in Page
  • 

    Hands-on: The divide instruction Page
  • 

    LIKWID tools: topology, affinity, clock speed File
  • 

    Hands-on: likwid-topology, likwid-pin, memory bandwidth Page
  • 

    The Roofline model: Introduction File

• Day 2
  • 

    LIKWID tools: hardware performance counters File
  • 

    Hands-on: Performance counters and memory bandwidth Page
  • 

    Roofline case study: Stencils File
  • 

    Performance Engineering basics File
  • 

    Hands-on: Dense matrix-vector multiplication Page
  • 

    dMVM analysis (solution) File
  • 

    Cache-coherent Non-Uniform Memory Architecture (ccNUMA) File

• Day 3
  • 

    Single Instruction Multiple Data (SIMD) File
  • 

    Hands-on: Analyzing the MiniMD proxy app Page
  • 

    Analysis spreadsheet template File
  • 

    Solution for "Fritz" CPU (Sapphire Rapids, Intel icc) File

    Excel 2007 spreadsheet
  • 

    Roofline case study: Sparse matrix-vector multiplication (SpMV) File
  • 

    Hands-on: Matrix-free CG solver Page

• Day 4
  • 

    Performance engineering from the application point of view File
  • 

    Introduction to Score-P File
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    Score-P Demo Page
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    Exercise: MiniMD Trace Collection Page
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    Walkthrough: MiniMD Trace Collection Page
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    Trace analysis with Vampir File
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    Exercise: : Load imbalance: SMxV Page
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    Solution: Load imbalance: SMxV Page

• Additional material

  Highlighted

  For publications of the RRZE HPC group, see https://hpc.fau.de/research/publications

  Important links:

  LIKWID tool suite: https://github.com/RRZE-HPC/likwid

  LIKWID documentation Wiki: http://tiny.cc/LIKWID

  Online Layer Condition calculator: http://tiny.cc/LayerConditions

  Kerncraft automatic Roofline/ECM modeling tool: https://github.com/RRZE-HPC/kerncraft

  MachineState system configuration script: https://github.com/RRZE-HPC/MachineState

• Feedback

  Please fill out the feedback form at:

  https://survey.hlrs.de/index.php/668734?lang=en